In recent years, speeding up and high integration of LSIs, large capacity of memories, and so on have been in progress, and with this, miniaturization, reduction in weight, thinning, and the like of various electronic components have been in progress rapidly. Therefore, materials are also required to have more excellent heat resistance, dimensional stability, electric properties, and so on.
Conventionally, thermosetting resins such as a phenol resin, an epoxy resin, and a polyimide resin have been used for printed wiring substrates. These resins have various performances in a balanced manner but have a poor dielectric property in a high-frequency range.
As a new material to solve this problem, polyphenylene ether attracts attention, and application of polyphenylene ether to a copper-clad laminate has been attempted (refer to JP-A 2005-008829). Further, in recent years, application of a product made by forming an alloy layer and a silane coupling agent adsorption layer on a copper foil surface has also been examined in order to correspond to a fine pitch of a circuit (refer to JP-B 4178415, JP-A 2003-201585).